Forum › Category: Digital › How does the sizing of PG(Access) transistors affect the stability of read and write operations in SRAM?
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AvatarVLSI Master asked 1 month ago
3 Answers
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AvatarCircuitDesigner answered 1 month ago
We must carefully size the PG transistors to balance performance and stability. If the PGs are too weak, the read operation becomes slower because the bit line discharge current is limited. For writes, weak PGs might struggle to pull the nodes to the required values, especially when driving against stronger pull-up or pull-down devices in the cross-coupled inverters. This could lead to incomplete data writing in SRAM.
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Avatarsemiconductor answered 1 month ago

You have to ensure Access(PG) transistors aren’t oversized or undersized because it affects the SRAM’s reliability. Oversizing can make the read operation unsafe by allowing excessive current flow, which might disturb the stored data. On the other hand, Access(PG) transistors undersizing leads to slower operations and increases power consumption since the bit line voltages take longer to settle. Balancing the PG strength is always a design challenge in achieving both speed and data integrity.

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AvatarDigitalWorld answered 1 month ago

I think the PG transistor sizing is important because it directly impacts the current flow during both read and write operations. If the Access transistors are too strong, the storage nodes might experience significant voltage disturbances during a read, leading to potential flipping of the stored value. You also risk an imbalance in write operation timing, where one node flips faster than the other, causing instability.

Its also depend on other paramaters also, like wordline volatge and thresold voltahe