Forum › Category: Layout
Layout
What is Latch Up in VLSI?
AnsweredAvatarsemiconductor answered 1 month ago • 
129 views2 answers0 votes
Shielding should be done with VDD or VSS and on which factors it depends?
AnsweredAvatarsemiconductor answered 1 month ago • 
154 views1 answers0 votes
What is the use of LDD (Lightly Doped Drain) in transistor design?
AnsweredAvatarDigitalWorld answered 2 months ago • 
241 views1 answers0 votes
Why Setup is checked at max corner and Hold at min corner?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
235 views1 answers0 votes
How Buffer Can Be Used In Victim To Avoid Crosstalk?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
192 views1 answers0 votes
Let’s assume I have three clock metal routing nets, and I don’t have space in the layout for shielding those three nets, with two of them having the same clock direction. How should I arrange all three, and why?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
385 views1 answers0 votes
Let’s assume I have two clock metal routing nets, and I don’t have space in the layout for shielding those two nets. What should I do?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
170 views1 answers0 votes
How Spacing Helps In Reducing Crosstalk Noise?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
155 views1 answers0 votes
Which Net Requires Shielding: Clock Net or Signal Net, and Why?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
241 views5 answers0 votes
How Shielding Avoids Crosstalk Problem? What Exactly Happens There?
AnsweredAvatarsemiconductor answered 2 months ago • 
133 views1 answers0 votes
Why Buffers Are Used In Clock Tree?
AnsweredAvatarsemiconductor answered 2 months ago • 
122 views1 answers0 votes
In A Reg to Reg Path If You Have Setup Problem Where Will You Insert Buffer-Near to Launching Flop or Capture Flop? Why?
AnsweredAvatarsemiconductor answered 2 months ago • 
150 views1 answers0 votes
If You Have Both Ir Drop And Congestion How Will You Fix It?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
158 views2 answers0 votes
What is spin-on glass (SOG) and Chemical-Mechanical Polishing (CMP)?
AnsweredAvatarCircuitDesigner answered 2 months ago • 
139 views2 answers0 votes
Why is Copper replacing Aluminium in modern VLSI Fabrication Processes?
OpenAvatarDigitalWorld answered 2 months ago • 
132 views2 answers0 votes
What is an epitaxial layer, and why do we need it in semiconductor manufacturing?
AnsweredAvatarsemiconductor answered 2 months ago • 
174 views2 answers0 votes
What is the channeling effect in ion implantation, and how can you prevent it?
AnsweredAvatarVLSI Master answered 3 months ago • 
158 views2 answers0 votes
Can someone explain how photolithography works in VLSI?
AnsweredAvatarsemiconductor answered 3 months ago • 
170 views2 answers0 votes
Why is silicon such a popular choice for making computer chips?
AnsweredAvatarsemiconductor answered 3 months ago • 
110 views2 answers0 votes
Drain-Induced Barrier Lowering in Advanced MOSFETs
AnsweredAvatarsemiconductor answered 4 months ago • 
275 views4 answers0 votes
12Next »
Ask Question