What is Channel length and Channel Length Modulation?
AnsweredAvatarsemiconductor answered 1 year ago • 
1486 views3 answers0 votes
What is the Polysilicon Depletion Effect?
AnsweredAvatarsemiconductor answered 1 year ago • 
1379 views4 answers0 votes
How Inversion Layer form in a MOSFET?
AnsweredAvatarDigitalWorld answered 1 year ago • 
697 views1 answers0 votes
How Many Types of Macros Are There in LEF/DEF?
AnsweredAvatarsemiconductor answered 1 year ago • 
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How Does Thinner Gate Oxide Achieve Faster MOSFET Switching?
OpenAnonymous commented 56 years ago • 
710 views3 answers1 votes
Why Use Higher Level Metals for Power/Ground Routing?
AnsweredAvatarCodeBook answered 1 year ago • 
933 views3 answers-1 votes
What is the need of performing Timing Analysis?
AnsweredAvatarSemiconwiki answered 1 year ago • 
1367 views6 answers0 votes
Subthreshold Leakage Reduction in CMOS Digital Circuits
AnsweredAvatarCircuitDesigner answered 1 year ago
1074 views4 answers2 votes
What are the main design challenges in ASIC design?
AnsweredAvatarVLSI Master answered 1 year ago • 
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How do I permanently delete files in Linux to prevent data recovery?
AnsweredAvatarTechGuru answered 1 year ago • 
821 views4 answers0 votes
Difference Between SRAM and DRAM(Advantages of SRAM over DRAM)
AnsweredAvatarDigitalWorld answered 1 year ago • 
1172 views2 answers0 votes
What are the causes and prevention techniques of latch-up in VLSI?
AnsweredAvatarCircuitDesigner answered 1 year ago
1077 views2 answers2 votes
What is latchup in Bulk CMOS technology?
AnsweredAvatarCircuitDesigner answered 1 year ago • 
643 views1 answers5 votes